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| IPA028N08N3 G OptiMOS(TM)3 Power-Transistor Features * Ideal for high frequency switching and sync. rec. * Optimized technology for DC/DC converters * Excellent gate charge x R DS(on) product (FOM) * Very low on-resistance RDS(on) * N-channel, normal level * 100% avalanche tested * Pb-free plating; RoHS compliant * Qualified according to JEDEC1) for target applications Type IPA028N08N3 G Product Summary V DS R DS(on),max ID 80 2.8 89 V m A Package Marking PG-TO-220-FP 028N08N Maximum ratings, at T j=25 C, unless otherwise specified Parameter Continuous drain current Symbol Conditions ID T C=25 C2) T C=100 C Pulsed drain current3) Avalanche energy, single pulse4) Gate source voltage Power dissipation Operating and storage temperature IEC climatic category; DIN IEC 68-1 1) 2) Value 89 62 352 1430 20 Unit A I D,pulse E AS V GS P tot T j, T stg T C=25 C I D=89 A, R GS=25 mJ V W C T C=25 C 42 -55 ... 175 55/175/56 J-STD20 and JESD22 Current is limited by package; with an RthJC=0.5K/W in a standard TO-220 package the chip is able to carry 251A. 3) See figure 3 for more detailed information 4) See figure 13 for more detailed information Rev. 2.0 page 1 2009-02-23 IPA028N08N3 G Parameter Symbol Conditions min. Values typ. max. Unit Thermal characteristics Thermal resistance, junction - case R thJC 3.6 K/W Electrical characteristics, at T j=25 C, unless otherwise specified Static characteristics Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current V (BR)DSS V GS=0 V, I D=1 mA V GS(th) I DSS V DS=V GS, I D=270 A V DS=80 V, V GS=0 V, T j=25 C V DS=80 V, V GS=0 V, T j=125 C Gate-source leakage current Drain-source on-state resistance I GSS R DS(on) V GS=20 V, V DS=0 V V GS=10 V, I D=89 A V GS=6 V, I D=44 A Gate resistance Transconductance RG g fs |V DS|>2|I D|R DS(on)max, I D=89 A 80 2 2.8 0.1 3.5 1 A V 89 10 1 2.4 2.8 2.7 178 100 100 2.8 4.2 S nA m Rev. 2.0 page 2 2009-02-23 IPA028N08N3 G Parameter Symbol Conditions min. Values typ. max. Unit Dynamic characteristics Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Gate Charge Characteristics 5) Gate to source charge Gate to drain charge Switching charge Gate charge total Gate plateau voltage Output charge Reverse Diode Diode continous forward current Diode pulse current Diode forward voltage Reverse recovery time Reverse recovery charge 5) C iss C oss C rss t d(on) tr t d(off) tf V DD=40 V, V GS=10 V, I D=89 A, R G=1.6 V GS=0 V, V DS=40 V, f =1 MHz - 10700 2890 100 30 59 77 26 14200 pF 3840 ns Q gs Q gd Q sw Qg V plateau Q oss V DD=40 V, V GS=0 V V DD=40 V, I D=89 A, V GS=0 to 10 V - 50 30 50 155 4.6 210 206 279 nC V nC IS I S,pulse V SD t rr Q rr T C=25 C V GS=0 V, I F=89 A, T j=25 C V R=40 V, I F=I S, di F/dt =100 A/s - 0.9 78 181 89 356 1.2 - A V ns nC See figure 16 for gate charge parameter definition Rev. 2.0 page 3 2009-02-23 IPA028N08N3 G 1 Power dissipation P tot=f(T C) 2 Drain current I D=f(T C); V GS10 V 50 100 40 80 30 60 P tot [W] 20 I D [A] 40 10 20 0 0 50 100 150 200 0 0 50 100 150 200 T C [C] T C [C] 3 Safe operating area I D=f(V DS); T C=25 C; D =0 parameter: t p 103 limited by on-state resistance 1 s 10 s 4 Max. transient thermal impedance Z thJC=f(t p) parameter: D =t p/T 101 10 2 100 s 1 ms 10 ms 0.5 100 0.2 I D [A] DC Z thJC [K/W] 101 0.1 0.05 100 10-1 0.02 0.01 10-1 single pulse 10 -2 10 100 101 102 -2 10-1 10-5 10-4 10-3 10-2 10-1 100 101 V DS [V] t p [s] Rev. 2.0 page 4 2009-02-23 IPA028N08N3 G 5 Typ. output characteristics I D=f(V DS); T j=25 C parameter: V GS 350 7V 10 V 6V 6 Typ. drain-source on resistance R DS(on)=f(I D); T j=25 C parameter: V GS 10 300 8 5.5 V 4.5 V 5V 5.5 V 250 200 150 R DS(on) [m] 6 I D [A] 5V 4 6V 7V 10 V 100 2 50 4.5 V 0 0 1 2 3 4 5 0 0 50 100 150 200 250 300 350 V DS [V] I D [A] 7 Typ. transfer characteristics I D=f(V GS); |V DS|>2|I D|R DS(on)max parameter: T j 300 8 Typ. forward transconductance g fs=f(I D); T j=25 C 240 250 200 200 160 150 g fs [S] 175 C 25 C I D [A] 120 100 80 50 40 0 0 2 4 6 8 0 0 40 80 120 160 V GS [V] I D [A] Rev. 2.0 page 5 2009-02-23 IPA028N08N3 G 9 Drain-source on-state resistance R DS(on)=f(T j); I D=89 A; V GS=10 V 10 Typ. gate threshold voltage V GS(th)=f(T j); V GS=V DS parameter: I D 6 4 5 3 4 2700 A R DS(on) [m] 270 A max 3 typ V GS(th) [V] 100 140 180 2 2 1 1 0 -60 -20 20 60 0 -60 -20 20 60 100 140 180 T j [C] T j [C] 11 Typ. capacitances C =f(V DS); V GS=0 V; f =1 MHz 12 Forward characteristics of reverse diode I F=f(V SD) parameter: T j 105 103 Ciss 104 Coss 175 C, 98% 10 2 25 C 175 C C [pF] 103 I F [A] 25 C, 98% Crss 101 102 101 0 20 40 60 80 100 0 0.5 1 1.5 2 V DS [V] V SD [V] Rev. 2.0 page 6 2009-02-23 IPA028N08N3 G 13 Avalanche characteristics I AS=f(t AV); R GS=25 parameter: T j(start) 1000 14 Typ. gate charge V GS=f(Q gate); I D=89A pulsed parameter: V DD 12 40 V 10 20 V 60 V 100 8 V GS [V] 10000 I AV [A] 6 150 C 100 C 25 C 10 4 2 1 1 10 100 1000 0 0 50 100 150 200 t AV [s] Q gate [nC] 15 Drain-source breakdown voltage V BR(DSS)=f(T j); I D=1 mA 16 Gate charge waveforms 90 V GS 85 Qg 80 V BR(DSS) [V] 75 V g s(th) 70 65 Q g(th) Q gs -60 -20 20 60 100 140 180 Q sw Q gd Q g ate 60 T j [C] Rev. 2.0 page 7 2009-02-23 IPA028N08N3 G PG-TO-220-FP Rev. 2.0 page 8 2009-02-23 IPA028N08N3 G Published by Infineon Technologies AG 81726 Munich, Germany (c) 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.0 page 9 2009-02-23 |
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